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ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 1 post office box 655303 ? dallas, texas 75265 low power adsl line driver ideal for central office 1.35-w total power dissipation for full-rate adsl into a 25- w load low-impedance shutdown mode allows reception of incoming signal during standby two modes of operation class-g mode: 4 power supplies, 1.35 w power dissipation class-ab mode: 2 power supplies, 2 w power dissipation low distortion thd = 62 dbc at f = 1 mhz, v o(pp) = 20 v, 25- w load thd = 69 dbc at f = 1 mhz, v o(pp) = 2 v, 25- w load 400-ma minimum output current into a 25- w load high speed 65-mhz bandwidth ( 3db) , 25- w load 100-mhz bandwidth ( 3db) , 100- w load 1200 v/ m s slew rate thermal shutdown and short circuit protection evaluation module available description the ths6032 is a low-power line driver ideal for asymmetrical digital subscriber line (adsl) applications. this device contains two high-current, high-speed current-feedback drivers, which can be configured differentially for driving adsl signals at the central office. the ths6032 features a unique class-g architecture to lower power consumption to 1.35 w. the ths6032 can also be operated in a traditional class-ab mode to reduce the number of power supplies to two. high-speed xdsl line driver/receiver family device driver receiver 5 v 5 v 15 v description ths6002 ? ? ? ? 500-ma differential line driver and receiver ths6012 ? ? ? 500-ma differential line driver ths6022 ? ? ? 250-ma differential line driver ths6032 ? ? ? 500-ma low-power adsl central-office line driver ths6062 ? ? ? ? low-noise adsl receiver ths6072 ? ? ? low-power adsl receiver ths7002 ? ? ? low-noise programmable-gain adsl receiver caution: the ths6032 provides esd protection circuitry. however, permanent damage can still occur if this device is subjected to high-energy electrostatic discharges. proper esd precautions are recommended to avoid any performance degradation or loss of functionality. copyright ? 2000, texas instruments incorporated please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 pad 2 v cch 1out v ccl 1in 1in+ nc shdn1 shdn2 pad 2 pad 2 v cch + 2out v ccl + 2in 2in+ nc nc dgnd pad 2 thermally enhanced soic (dwp) powerpad ? package (top view) nc not connected 2 this terminal is internally connected to the thermal pad. cross section view showing powerpad (side view) microstar junior ? (gqe) package (top view) powerpad and microstar junior are trademarks of texas instruments. production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters.
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 2 post office box 655303 ? dallas, texas 75265 description the class-g architecture supplies current to the load from four supplies. for low output voltages (typically 2.5 < v o < +2.5), some of the output current is supplied from the +v cc(l) and v cc(l) supplies (typically 5 v). for large output voltages (typically v o < 2.5 and v o > + 2.5), the output current is supplied from +v cc(h) and v cc(h) (typically 15 v). this current sharing between v cc(l) and v cc(h) minimizes power dissipation within the ths6032 output stages for high crest factor adsl signals. the ths6032 features a low-impedance shutdown mode, which allows the central office to receive incoming calls even after the device has been shut down. the ths6032 is available packaged in the patented powerpad package. this package provides outstanding thermal characteristics in a small-footprint surface-mount package, which is fully compatible with automated surface-mount assembly procedures. it is also available in the new micostar junior bga package. this package is only 25 mm 2 in area, allowing for high density pcb designs. shutdown (shdn1 and shdn2) allows for powering down the internal circuitry for power conservation or for multiplexing. separate shutdown controls are available for each channel on the ths6032. the control levels are ttl compatible. when turned off, each driver output is placed in a low impedance state which is determined by the voltage at dgnd. this virtual ground at the outputs allows proper termination of a transmission line. available options packaged devices packaged devices t a powerpad plastic small outline (dwp) microstar junior (bga) (gqe) evaluation modules 0 c to 70 c ths6032cdwp ths6032cgqe THS6032EVM ths6032gqe evm 3 40 c to 85 c ths6032idwp ths6032igqe e 2 the ths6032 is available taped and reeled. add an r suffix to the device type (i.e.,ths6032cdwpr) 3 uses the ths6032cgqe packaging option. terminal functions terminal name dwp package terminal no. gqe package terminal no. 1out 3 b1 1in 5 f1 1in+ 6 h1 2out 18 b9 2in 16 f9 2in+ 15 h9 v cch 2 a3 v cch+ 19 a7 v ccl 4 d1 v ccl+ 17 d9 shdn1 8 j2 shdn2 9 j4 dgnd 12 j7 pad 1, 10, 11, 20 n/a nc 7, 13, 14 n/a
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 3 post office box 655303 ? dallas, texas 75265 pin assignments 9 8 7 6 5 a b c d e f 3 2 1 g h j 4 dgnd v ccl+ shdn1 1out 1in nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc 2out nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc v cch+ shdn2 nc nc nc nc nc nc nc nc nc nc nc nc v cch nc nc nc 2in nc nc nc nc 1in+ v ccl note: shaded terminals are used for thermal connection to the ground plane. 2in+ microstar junior ? (gqe) package (top view)
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 4 post office box 655303 ? dallas, texas 75265 functional block diagram (soic package) v ccl+ dgnd + v cch+ 2out 19 18 17 16 15 12 2in 2in+ 1out 1in 1in+ v ccl v cch shdn1 8 5 6 3 2 4 + shdn2 9 note a: terminals 1, 10, 11, and 20 are internally connected to the thermal pad. absolute maximum ratings over operating free-air temperature (unless otherwise noted) 2 supply voltage, v cc(l) and v cc(h) (see note 1) 33 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage, v i v cch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output current, i o (see note 2) 800 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . differential input voltage, v id 4 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . total power dissipation at (or below) 25 c free-air temperature (see note 2) see dissipation rating table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . maximum junction temperature, t j 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating free-air temperature, t a , c-suffix 0 c to 70 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i-suffix 40 c to 85 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature, t stg 65 c to 125 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lead temperature 1,6 mm (1/16 in) from case for 10 seconds 300 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. v cc(l) must always be less than or equal to v cc(h) 2. the ths6032 incorporates a powerpad on the underside of the chip. this acts as a heatsink and must be connected to a thermall y dissipative plane for proper power dissipation. failure to do so may result in exceeding the maximum junction temperature which could permanently damage the device. see the thermal information section for more information about utilizing the powerpad thermally enhanced packages. dissipation rating table 3 package q ja ( c/w) q jc ( c/w) t a = 25 c power rating dwp 21.5 0.37 5.8 w gqe 37.8 4.56 3.3 w 3 this data was taken using 2 oz. trace and copper pad that is soldered directly to a jedec standard 4 layer 3 in 3 in pcb.
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 5 post office box 655303 ? dallas, texas 75265 recommended operating conditions min nom max unit v cc(l) class g mode 3 5 v cch v supply voltage v cc(l) class ab mode 0 0 0 v su ly voltage v cc(h) 5 15 16 v o p erating free air tem p eratures t a c-suffix 0 70 c operating free-air temperatures, t a i-suffix 40 85 c electrical characteristics, v cc(l) = 5 v, v cc(h) = 15 v, r l = 25 w, t a = 25 c (unless otherwise noted) dynamic performance parameter test conditions min typ max unit gain 1 r 1 3 k w r l = 25 w 65 mhz small signal bandwidth ( 3 db) gain = 1, r f = 1.3 k w r l = 100 w 100 mhz small signal bandwidth (3 db) gain 2 r 1 1 k w r l = 25 w 60 mhz bw gain = 2, r f = 1.1 k w r l = 100 w 70 mhz bw bandwidth for 0 1 db flatness gain = 1 30 mhz bandwidth for 0.1 db flatness gain = 2 25 mhz full power bandwidth 2 v opp = 20 v 19 mhz sr slew rate 3 gain = 5, v o(pp) = 20 v 1200 v/ m s t s settling time to 0.1% gain = 1, r l = 25 w , 5 v step 120 ns 2 full power bandwidth = slew rate/2 p v peak 3 slew rate is defined from the 25% to the 75% output levels. noise/distortion performance parameter test conditions min typ max unit thd total harmonic distortion v o = 20 v (pp) , gain = 5, f = 1 mhz 62 dbc thd total harmonic distortion v o = 2 v (pp) , gain = 2, f = 1 mhz 69 dbc v n input voltage noise f = 10 khz 2.4 nv/ hz i input current noise f 10 khz i n+ 11 nv/ hz i n input current noise f = 10 khz i n 15 nv/ ?? ???????????? ???? ????? ???? ? ???? ? ?? w 0.016% differential gain error gain = 2, ntsc r l = 25 w 0.020% differential phase error gain 2 ntsc r l = 150 w 0.04 differential phase error gain = 2, ntsc r l = 25 w 0.30 crosstalk f = 1 mhz, gain = 2, r f = 1.1 k w 62 db
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 6 post office box 655303 ? dallas, texas 75265 electrical characteristics, v cc(l) = 5 v, v cc(h) = 15 v, r l = 25 w, t a = 25 c (unless otherwise noted) (continued) dc performance parameter test conditions min typ max unit z (t) open loop transimpedance r l = 1 k w 2 m w v input offset voltage t a = 25 c 1.5 5 mv v io input offset voltage t a = full range 7 mv offset voltage drift 10 m v/ c differential offset voltage t a = 25 c 0.5 3 mv differential offset voltage t a = full range 6 mv negative input bias current t a = 25 c 1.5 9 i negative input bias current t a = full range 12 a i ib positive input bias current t a = 25 c 1.5 9 m a positive input bias current t a = full range 12 input characteristics parameter test conditions min typ max unit v icr input common-mode voltage range 13.2 13.4 v cmrr common-mode rejection ratio t a = full range 64 72 db r input resistance inverting terminal 15 w r i input resistance non inverting terminal 400 k w differential input capacitance 1.4 pf output characteristics parameter test conditions min typ max unit v output voltage single-ended r l = 25 w 10.5 11 v v o output voltage differential r l = 50 w 21 22 v i o output current 2 r l = 25 w 400 440 ma i sc short-circuit current 2 800 ma 2 a heat sink is required to keep junction temperature below absolute maximum when an output is heavily loaded or shorted. see aa bsolute maximum ratings.o power supply parameter test conditions min typ max unit v operating range v ccl 0 5 v cch v v cc operating range v cch 5 15 16.5 v v t a = 25 c 4.3 5.8 ma i quiescent current (per amplifier) v ccl t a = full range 6.2 ma i cc quiescent current (per amplifier) v ta = 25 c 4 5 ma v cch t a = full range 5.5 ma v ta = 25 c 90 100 db psrr power supply rejection ratio v ccl t a = full range 80 db psrr power supply rejection ratio v ta = 25 c 69 80 db v cch t a = full range 66 db
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 7 post office box 655303 ? dallas, texas 75265 electrical characteristics, v cc(l) = 5 v, v cc(h) = 15 v, r l = 25 w, t a = 25 c (unless otherwise noted) (continued) shutdown characteristics parameter test conditions min typ max unit v il shutdown voltage for power up relative to dgnd terminal 0.8 v v ih shutdown voltage for power down relative to dgnd terminal 2 v i ih shutdown input current-high v (shdn) = 5 v 200 300 m a i il shutdown input current-low v (shdn) = 0.5 v 20 40 m a z o output impedance (while in shutdown state) v (shdn) = 2.5 v, f = 1 mhz 0.5 w i ccl su pp ly current ( p er am p lifier) (while in shutdown state) v (shdn) =25v v o =0v 0.05 0.2 ma i cch supply current (per amplifier) (while in shutdown state) v (shdn) = 2.5 v, v o = 0 v 2.4 3 ma t dis disable time 2 1.1 m s t en enable time 2 1.5 m s 2 disable/enable time begins when the logic signal is applied to the shutdown terminal and ends when the supply current has reach ed half of its final value.
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 8 post office box 655303 ? dallas, texas 75265 typical characteristics figure 1 7 6 5 4 3 2 1 0 1 2 output amplitude vs frequency f frequency hz v cc(h) = 15 v v cc(l) = 5 v gain = +1 r l = 25 w v o = 0.2 v rms r f = 1.5 k w 1 m 10 m 100 m 100 k 500 m output amplitude db r f = 1 k w r f = 1.3 k w figure 2 0.4 0.3 0.2 0.1 0.0 0.1 0.2 0.3 0.4 output amplitude vs frequency f frequency hz v cc(h) = 15 v v cc(l) = 5 v gain = +1 r l = 25 w v o = 0.2 v rms r f = 1.5 k w 1 m 10 m 100 m 100 k 500 m output amplitude db r f = 1.3 k w r f = 1 k w figure 3 1 0 1 2 3 4 5 6 7 8 output amplitude vs frequency f frequency hz v cc(h) = 15 v v cc(l) = 5 v gain = +2 r l = 25 w v o = 0.4 v rms r f = 1.1 k w 1 m 10 m 100 m 100 k 500 m output amplitude db r f = 1.3 k w r f = 820 w figure 4 5.6 5.7 5.8 5.9 6.0 6.1 6.2 6.3 6.4 output amplitude vs frequency f frequency hz v cc(h) = 15 v v cc(l) = 5 v gain = +2 r l = 25 w v o = 0.4 v rms r f = 1.1 k w 1 m 10 m 100 m 100 k 500 m output amplitude db r f = 1.3 k w r f = 820 w figure 5 7 8 9 10 11 12 13 14 15 16 output amplitude vs frequency f frequency hz v cc(h) = 15 v v cc(l) = 5 v gain = +5 r l = 25 w v o = 0.2 v rms r f = 1.5 k w 1m 10m 100m 100k 500m output amplitude db r f = 820 w r f = 330 w figure 6 13 14 15 16 17 18 19 20 21 22 output amplitude vs frequency f frequency hz v cc(h) = 15 v v cc(l) = 5 v gain = +10 r l = 25 w v o = 0.2 v rms 1m 10m 100m 100k 500m output amplitude db r f = 1 k w r f = 510 w figure 7 6 4 2 0 2 4 6 8 class-ab mode output amplitude vs frequency v cc(h) = 15 v v cc(l) = gnd g = +2 r f =1.1 k w r l = 25 w v i = 0.2 v rms 1 m 10 m 100 m 100 k 500 m class-ab mode output amplitude db g = +1 r f =1.3 k w f frequency hz figure 8 8 6 4 2 0 2 4 6 8 output amplitude vs frequency f frequency hz v cc(h) = 15 v v cc(l) = 5 v r l = 100 w v in = 0.2 v rms gain = +2, r f = 1.1 k w 1 m 10 m 100 m 100 k 500 m output amplitude db gain = +1, r f = 1.3 k w figure 9 18 12 6 0 6 12 18 small and large signal frequency response f frequency hz v cc(h) = 15 v v cc(l) = 5 v 1 m 10 m 100 m 100 k 500 m v o(pp) = 4 v v o(pp) = 2 v v o(pp) = 1 v v o(pp) = 0.5 v v o(pp) = 0.25 v gain = +1 r l = 25 w r f = 1.3 k w normalized output voltage dbv v o
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 9 post office box 655303 ? dallas, texas 75265 typical characteristics figure 10 12 6 0 6 12 18 24 small and large signal frequency response f frequency hz v cc(h) = 15 v v cc(l) = 5 v 1 m 10 m 100 m 100 k 500 m v o(pp) = 8 v v o(pp) = 4 v v o(pp) = 2 v v o(pp) = 1 v v o(pp) = 0.5 v gain = +2 r l = 25 w r f = 1.1 k w normalized output voltage dbv v o figure 11 100 90 80 70 60 50 40 30 20 class-g mode distortion vs frequency f frequency hz v cc(h) = 15 v v cc(l) = 5 v to 7.5 v gain = +2 r f = 1.1 k w r l = 25 w v o(pp) = 2 v 2nd harmonic 1 m 10 m 100 k 20 m class-g mode distortion dbc 3rd harmonic thd figure 12 100 90 80 70 60 50 40 30 20 class-ab mode distortion vs frequency f frequency hz v cc(h) = 15 v v cc(l) = gnd gain = +2 r f = 1.1 k w r l = 25 w v o(pp) = 2 v 2nd harmonic 1 m 10 m 100 k 20 m class-ab mode distortion dbc 3rd harmonic thd figure 13 90 85 80 75 70 65 60 55 50 0 5 10 15 20 2nd order distortion vs output voltage v o(pp) output voltage v v cc(h) = 15 v gain = +5 r f = 1.1 k w r l = 25 w f = 1 mhz v cc(l) = 5 v 2nd order distortion dbc v cc(l) = 7.5 v v cc(l) = 6 v v cc(l) = gnd figure 14 90 85 80 75 70 65 60 55 50 0 5 10 15 20 3rd order distortion vs output voltage v o(pp) output voltage v v cc(h) = 15 v gain = +5 r f = 1.1 k w r l = 25 w f = 1 mhz v cc(l) = 5 v 3rd order distortion dbc v cc(l) = 7.5 v v cc(l) = 6 v v cc(l) =gnd figure 15 90 85 80 75 70 65 60 55 50 0 5 10 15 20 thd vs output voltage v o(pp) output voltage v v cc(h) = 15 v gain = +5 r f = 1.1 k w r l = 25 w f = 1 mhz v cc(l) = 5 v total harmonic distortion dbc v cc(l) = 7.5 v v cc(l) = 6 v v cc(l) =gnd figure 16 80 70 60 50 40 30 20 10 0 crosstalk vs frequency f frequency hz v cc(h) = 15 v v cc(l) = 5 v gain = +2 r f = 1.1 k w r l = 25 w input = ch. 2 output = ch. 1 input = ch. 1 output = ch. 2 1 m 10 m 100 m 100 k 500 m crosstalk db figure 17 0 200 400 600 800 1000 1200 1400 0 5 10 15 20 slew rate vs output step v o(pp) output voltage step v sr slew rate v/ m s v cc(h) = 15 v v cc(l) = 5 v gain = +5 r f = 1.1 k w r l = 25 w +sr sr figure 18 voltage and current noise vs frequency 100 1 10 f frequency hz 100 100 k 10 k 1 k 10 v n v cc(h) = 15 v v cc(l) = 5 v t a = 25 c i n i n + nv/ hz voltage noise v n i n current noise pa/ hz
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 10 post office box 655303 ? dallas, texas 75265 typical characteristics figure 19 20 40 60 80 100 120 140 transimpedance vs frequency f frequency hz 1 k 10 k 100 k transimpedance db 1 m 10 m 100 m 1 g v cc(h) = 15 v v cc(l) = 5 v r l = 1 k w w figure 20 0 20 40 60 80 100 120 power supply rejection ratio vs frequency f frequency hz 10 k 100 k 1 m 10 m 100 m v cc(h) = 15 v v cc(l) = 5 v gain = +2 r f = 1.1 k w r l = 25 w psrr power supply rejection ratio db +v cc(l) v cc(l) v cc(h) figure 21 0 10 20 30 40 50 60 70 80 common-mode rejection ratio vs frequency f frequency hz 10 k 100 k 1 m 10 m 100 m v cc(h) = 15 v v cc(l) = 5 v r f = 1 k w r l = 25 w cmrr common-mode rejection ratio db figure 22 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 40 20 0 20 40 60 80 100 supply current vs free-air temperature i cc(l) t a free-air temperature c i cc supply current ma i cc(h) v cc(h) = 15 v v cc(l) = 5 v per amplifier figure 23 10.6 10.8 11.0 11.2 11.4 11.6 11.8 12.0 40 20 0 20 40 60 80 100 maximum output voltage vs free-air temperature t a free-air temperature c v cc(h) = 15 v v cc(l) = 5 v out maximum output voltage v v +v out v out figure 24 1.0 1.2 1.4 1.6 1.8 2.0 40 20 0 20 40 60 80 100 input offset voltage vs free-air temperature t a free-air temperature c v cc(h) = 15 v cc(l) = 5 v v io input offset voltage mv 40 20 0 20 40 60 80 100 figure 25 input bias current vs free-air temperature lib+ i ib input bias current a m t a free-air temperature c lib 2 1.75 1.5 1.25 1 0.75 0.5 0.25 0 figure 26 12345678 differential gain vs loading gain = 2 r f = 1.1 k w 40 ire modulation worst case 100 ire ramp number of 150 w loads 0.02 0.03 0.04 0.05 0.01 0 v cc(h) = 15 v v cc(l) = 5 v pal ntsc differential gain % figure 27 0.0 0.1 0.2 0.3 0.4 0.5 12345678 differential phase vs loading gain = 2 r f = 1.1 k w 40 ire modulation worst case 100 ire ramp number of 150 w loads v cc(h) = 15 v v cc(l) = 5 v pal ntsc differential phase %
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 11 post office box 655303 ? dallas, texas 75265 typical characteristics figure 28 100 1000 .01 0.1 1 10 closed loop output impedance vs frequency f frequency hz closed loop output impedance z o w 1 m 10 m 100 m 100 k 500 m v cc(h) = 15 v v cc(l) = 5 v gain = +2 r f = 1 k w shut-down mode not shut-down 0 figure 29 40 20 0 20 40 60 80 100 standby supply current vs free-air temperature i cc(l) t a free-air temperature c i cc(h) i cc(h) v cc(h) = 15 v v cc(l) = 5 v v sd = 2.5 v per amplifier 2.25 2.50 2.75 3.00 2.00 1.50 1.75 50 52 54 56 48 44 46 i cc(l) stanby supply current a stanby supply current ma m figure 30 90 80 70 60 50 40 30 20 10 shutdown isolation vs frequency f frequency hz v cc(h) = 15 v v cc(l) = 5 v gain = +2 r l = 25 w r f = 1.1 k w v i = 0.2 v rms 1 m 10 m 100 m 100 k 500 m shutdown isolation db reverse isolation forward isolation figure 31 90 80 70 60 50 40 30 20 10 shutdown isolation vs frequency f frequency hz v cc(h) = 15 v v cc(l) = 5 v gain = 1 r l = 25 w r f = 1.1 k w v i = 0.2 v rms 1 m 10 m 100 m 100 k 500 m shutdown isolation db reverse isolation forward isolation figure 32 800 600 200 0 shutdown response t time m s 0481216 400 10 5 0 200 20 gain = +2 r f = 1.1 k w r l = 25 w output voltage mv v o 2 6 10 14 18 v sd shutdown voltage v figure 33 0.6 0.4 0.2 0.0 0.2 0.4 0.6 0 50 100 150 200 1 volt step response t time ns output voltage v v o v cc(h) = 15 v v cc(l) = 5 v gain = +2 r l = 25 w r f = 1.1 k w figure 34 3 2 1 0 1 2 3 0 50 100 150 200 5 volt step response t time ns output voltage v v o v cc(h) = 15 v v cc(l) = 5 v gain = +5 r l = 25 w r f = 1.1 k w figure 35 2 0 4 6 10 v pulse response t time ns 075 50 25 100 125 175 150 200 225 2 8 6 4 8 250 v cc(h) = 15 v v cc(l) = 5 v gain = +5 r f = 1.1 k w r l = 25 w t r /t f = 6 ns output voltage v v o
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 12 post office box 655303 ? dallas, texas 75265 application information adsl the ths6032 was primarily designed as a low-power line driver for adsl (asymmetrical digital subscriber line). the driver output stage has been sized to provide full adsl power levels of 20 dbm onto the telephone lines. although actual driver output peak voltages and currents vary with each particular adsl application, the ths6032 is specified for a minimum full output current of 400 ma at its full output voltage of approximately 11 v. this performance meets the demanding needs of adsl at the central office end of the telephone line. a typical adsl schematic is shown in figure 36. _ + 6.8 m f 0.1 m f 6.8 m f 0.1 m f v cc(h) 15 v 200 w + + v i+ _ + 6.8 m f 0.1 m f 6.8 m f 0.1 m f v cc(h) 15 v 680 w + + v i + 0.1 m f 2 k w 12.5 w + 2 k w 1:2 telephone line 12.5 w 15 v 15 v 0.1 m f ths6072 ths6072 v o+ v o ths6032 driver 1 ths6032 driver 2 100 w v cc(l) 6 v v cc(l) 6 v driver 1 k w 1 k w 1 k w receiver 0.1 m f 0.1 m f 680 w 1 k w figure 36. ths6032 adsl application
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 13 post office box 655303 ? dallas, texas 75265 application information adsl (continued) the adsl transmit band consists of 255 separate carrier frequencies, each with its own modulation and amplitude level. with such an implementation, it is imperative that signals put onto the telephone line have as low a distortion as possible. this is because any distortion either interferes directly with other adsl carrier frequencies or it creates intermodulation products that interfere with adsl carrier frequencies. the ths6032 has been specifically designed for ultralow distortion by careful circuit implementation and by taking advantage of the superb characteristics of the complementary bipolar process. driver single-ended distortion measurements are shown in figures 11 15. it is commonly known that in the differential driver configuration, the second order harmonics tend to cancel out. thus, the dominant total harmonic distortion (thd) will be primarily due to the third order harmonics. additionally, distortion should be reduced as the feedback resistance drops. this is because the bandwidth of the amplifier increases, which allows the amplifier to react faster to any nonlinearities in the closed-loop system. another significant point is the fact that distortion decreases as the impedance load increases. this is because the output resistance of the amplifier becomes less significant as compared to the output load resistance. one problem that has been receiving a lot of attention in the adsl area is power dissipation. one way to substantially reduce power dissipation is to lower the power supply voltages. this is because the rms voltage of an adsl central office signal is 1.65-v rms at each driver's output with a 1:2 transformer. but, to meet adsl requirements, the drivers must have a voltage peak-to-rms crest factor of 5.6 in order to keep the bit-error probability rate below 10 7 . hence, the power supply voltages must be high enough to accomplish the driver's peak output voltage of 1.65 v 5.6 = 9.25 v (peak ) . this high peak output voltage requirement, coupled with a low rms voltage requirement, does not lend itself to conventional high efficiency designs. one way to save power is to decrease the bias currents internal to the amplifier. the drawback of doing this is an increase in distortion and a lower frequency response bandwidth. this is where the ths6032 class-g architecture is useful. the class-g output stage utilizes both a high supply voltage [v cc(h) typically 15 v] and a low supply voltage [(v cc(l) typically 6 v]. as long as the output voltage is less than [v cc(l) 2.5 v], then part of the output current will be drawn from the v cc(l) supplies. if the output signal goes above this cutoff point [for example, v o > v cc(l) 2.5 v], then all of the output current will be supplied by v cc(h) .
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 14 post office box 655303 ? dallas, texas 75265 application information adsl (continued) to ensure that the cutoff point does not introduce distortion into the system, the entire output stage is always biased on. this constant biasing scheme will cause a decrease in the efficiency over hard switching class-g circuits, but the very low distortion results tend to outweigh the efficiency loss. the biasing scheme used in the ths6032 can be shown by the currents being supplied by the v cc(l) power supplies in figure 37. this graph shows there is no discrete current transfer point between the v cc(l) supplies and the v cc(h) supplies. this was done to ensure low distortion throughout the entire output range. by changing the v cc(l) supply voltage, the system efficiency can be tailored to suit almost any system with high crest factor requirements. figure 37 70 60 50 0 01 23 45 6 output current distribution % 80 90 rms output voltage v output current distribution vs output voltage 100 7 40 30 20 10 v cc(h) = 15 v v i = 1 mhz r l = 25 w v cc(l) = 7.5 v v cc(l) = 5 v i cc(l) current draw class-ab mode operation the class-g architecture produces sizable power dissipation savings over traditional class-ab designs while maintaining low distortion requirements. the only drawback to the class-g design is the requirement of 4 power supply voltages, 2 more than a typical line driver requires. in certain instances, the addition of two separate power supplies may be cost prohibitive or pcb space prohibitive. there are two options in this case, use a traditional amplifier, such as a ths6012, or use the ths6032 in class-ab mode. using the ths6032 in class-ab mode will give several functional benefits over the ths6012. this includes shutdown capability, low-impedance output while in shutdown state, and a slight reduction in quiescent current. one important thing to remember is that the ths6032 running in class-ab mode, will be only about as efficient as the ths6012. this means that the power dissipation of the ths6032 will increase dramatically and must be accounted for. failure to do so will result in a part which continuously overheats and may lead to failure.
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 15 post office box 655303 ? dallas, texas 75265 application information class-ab mode operation (continued) to use the ths6032 in class-ab mode, the user should always connect the v cc(l) power supply pins to gnd. the internal v cc(l) paths were not designed for continuous full output current and could possibly fail. the v cc(h) paths were designed for the full output currents and thus, should be used for class-ab mode operation. the performance of the ths6032 while in class-ab mode is very similar to the class-g mode. figure 7 and figures 12 to15 show the ths6032 while in class-ab mode. device protection features the ths6032 has two built-in features that protect the device against improper operation. the first protection mechanism is output current limiting. should the output become shorted to ground the output current is automatically limited to the value given in the data sheet. while this protects the output against excessive current, the device internal power dissipation increases due to the high current and large voltage drop across the output transistors. continuous output shorts are not recommended and could damage the device. additionally, connection of the amplifier output to one of the high supply rails [ v cc(h) ] can cause failure of the device and is not recommended. the second built-in protection feature is thermal shutdown. should the internal junction temperature rise above approximately 180 c, the device automatically shuts down. such a condition could exist with improper heat sinking or if the output is shorted to ground. when the junction temperature drops below 150 c, the internal thermal shutdown circuit automatically turns the device back on. thermal information the ths6032 is available in a thermally-enhanced dwp package, which is a member of the powerpad family of packages. this package is constructed using a downset leadframe upon which the die is mounted [see figure 38(a) and figure 38(b)]. this arrangement results in the lead frame being exposed as a thermal pad on the underside of the package [see figure 38(c)]. because this thermal pad has direct thermal contact with the die, excellent thermal performance can be achieved by providing a good thermal path away from the thermal pad. die side view (a) end view (b) bottom view (c) die thermal pad note a: the thermal pad is electrically isolated from all terminals in the package. figure 38. views of thermally enhanced dwp package
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 16 post office box 655303 ? dallas, texas 75265 application information thermal information (continued) the ths6032 is also available in the microstar junior gqe package. just like the dwp package, the gqe package utilizes the powerpad functionality to improve thermal performance. the gqe package is part of the new ball-grid array (bga) family developed by texas instruments (ti ? ). this package allows for even higher density layouts with virtually no loss in thermal performance. its construction is similar to the dwp construction (see figure 39 (a) and (b)), but utilizes the bga's to transfer the heat away from the die. (top view) (a) (b) note: shaded areas are part of the thermally conductive path. die (side view) figure 39. views of thermally enhanced gqe package the powerpad packages allows for both assembly and thermal management in one manufacturing operation. during the surface-mount solder operation (when the leads or balls are being soldered), the thermal areas can also be soldered to a copper area underneath the package. through the use of thermal paths within this copper area, heat can be conducted away from the package into either a ground plane or other heat dissipating device. this is discussed in more detail in the pcb design considerations section of this document. the powerpad package represents a breakthrough in combining the small area and ease of assembly of surface mount with the, heretofore, awkward mechanical methods of heatsinking. because of its power dissipation, proper thermal management of the ths6032 is required. there are several ways to properly heatsink both the dwp and gqe packages. there are several ti application notes on how to best accomplish the thermal mounting scheme required for each package. for the dwp package, refer to the texas instruments technical brief, powerpad thermally enhanced package , literature number slma002. there is also a more compact technical paper entitled powerpad made easy , literature number slma004. for the gqe microstar junior package, refer to the microstar bga packaging reference guide , literature number ssyz015a and the compact version entitled microstar junior made easy , literature number ssya009. this literature is available on ti's web site at http://www.ti.com. ti is a trademark of texas instruments incorporated.
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 17 post office box 655303 ? dallas, texas 75265 application information thermal information (continued) the actual thermal performance achieved with the ths6032 in its powerpad package depends on the application. in the previous example, if the size of the internal ground plane is approximately 3 inches 3 inches, then the expected thermal coefficient, q ja , is about 21.5 c/w for the dwp package and 37.8 c/w for the gqe package. for a given q ja , the maximum power dissipation is shown in figure 40 and is calculated by the following formula: p d t max t a ja where: p d = maximum power dissipation of ths6032 (watts) t max = absolute maximum junction temperature (150 c) t a = free-ambient air temperature ( c) q ja = q jc + q ca q jc = thermal coefficient from junction to case (dwp =0.37 c/w; gqe = 4.56 c/w) q ca = thermal coefficient from case to ambient t a free-air temperature c 40 20 0 20 80 100 60 40 maximum power dissipation vs free-air temperature 5 3 1 0 4 2 6 7 maximum power dissipation w 8 9 t j = 150 c pcb size = 3o x 3o no air flow dwp q ja = 21.5 c/w 2 oz trace and copper pad with solder dwp q ja = 43.9 c/w 2 oz trace and copper pad without solder gqe figure 40. maximum power dissipation vs free-air temperature
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 18 post office box 655303 ? dallas, texas 75265 application information pcb design considerations proper pcb design techniques in two areas are important to assure proper operation of the ths6032. these areas are high-speed layout techniques and thermal-management techniques. because the ths6032 is a high-speed part, the following guidelines are recommended. ground plane it is essential that a ground plane be used on the board to provide all components with a low inductive ground connection. although a ground connection directly to a terminal of the ths6032 is not necessarily required, it is recommended that the thermal pad of the package be tied to ground. this serves two functions. it provides a low inductive ground to the device substrate to minimize internal crosstalk and it provides the path for heat removal. input stray capacitance to minimize potential problems with amplifier oscillation, the capacitance at the inverting input of the amplifiers must be kept to a minimum. to do this, pcb trace runs to the inverting input must be as short as possible, the ground plane must be removed under any etch runs connected to the inverting input, and external components should be placed as close as possible to the inverting input. this is especially true in the noninverting configuration. an example of this can be seen in figure 41, which shows what happens when a 2.2 pf capacitor is added to the inverting input terminal in the noninverting configuration. the bandwidth increases dramatically at the expense of peaking. this is because some of the error current is flowing through the stray capacitor instead of the inverting node of the amplifier. while the device is in the inverting mode, stray capacitance at the inverting input has a minimal effect. this is because the inverting node is at a virtual ground and the voltage does not fluctuate nearly as much as in the noninverting configuration. this can be seen in figure 42, where a 27-pf capacitor adds only 2.5 db of peaking. in general, as the gain of the system increases, the output peaking due to this capacitor decreases. while this can initially appear to be a faster and better system, overshoot and ringing are more likely to occur under fast transient conditions. so, proper analysis of adding a capacitor to the inverting input node should always be performed for stable operation. figure 41 5 4 3 2 1 0 1 2 3 4 output amplitude vs frequency f frequency hz v cc(h) = 15 v v cc(l) = 5 v gain = +1 r l = 25 w v o = 0.2 v rms 1 m 10 m 100 m 100 k 500 m c i = 2.2 pf output amplitude db c i = 0 pf 1.3 k w c i v i + v o 25 w 50 w figure 42 5 4 3 2 1 0 1 2 3 4 output amplitude vs frequency f frequency hz v cc(h) = 15 v v cc(l) = 5 v gain = 1 r l = 25 w v o = 0.2 v rms 1 m 10 m 100 m 100 k 500 m c i = 27 pf output amplitude db c i = 0 pf 1.1 k w c i v i + v o r l = 25 w 50 w 1.1 k w
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 19 post office box 655303 ? dallas, texas 75265 application information pcb design considerations (continued) proper power supply decoupling use a minimum of a 6.8- m f tantalum capacitor in parallel with a 0.1- m f ceramic capacitor on each supply terminal. it may be possible to share the tantalum among several amplifiers depending on the application, but a 0.1- m f ceramic capacitor should always be used on the supply terminal of every amplifier. in addition, the 0.1- m f capacitor should be placed as close as possible to the supply terminal. as this distance increases, the inductance in the connecting etch makes the capacitor less effective. the designer should strive for distances of less than 0.1 inches between the device power terminal and the ceramic capacitors. differential power supply decoupling the ths6032 was designed for driving low-impedance differential signals. the 25 w load which each amplifier drives causes large amounts of currents to flow from amplifier to amplifier. power supply decoupling for differential current signals must be accounted for to ensure low distortion of the ths6032. by simply connecting a 0.1- m f ceramic capacitor from the +v cc(h) pin to the v cc(h) pin, along with another 0.1- m f ceramic capacitor from the +v cc(l) pin to the v cc(l) pin, differential current loops will be minimized (see figure 36). this will help keep the ths6032 operating at peak performance. recommended feedback and gain resistor values as with all current feedback amplifiers, the bandwidth of the ths6032 is an inversely proportional function of the value of the feedback resistor. this can be seen from figures 1 to 6. the recommended resistors for the optimum frequency response with a 25- w load system can be seen in table 1. these should be used as a starting point and once optimum values are found, 1% tolerance resistors should be used to maintain frequency response characteristics. for most applications, a feedback resistor value of 1.3 k w is recommended, which is a good compromise between bandwidth and phase margin that yields a very stable amplifier. consistent with current feedback amplifiers, increasing the gain is best accomplished by changing the gain resistor, not the feedback resistor. this is because the bandwidth of the amplifier is dominated by the feedback resistor value and the internal dominant-pole capacitor. the ability to control the amplifier gain independently of the bandwidth constitutes a major advantage of current feedback amplifiers over conventional voltage feedback amplifiers. therefore, once a frequency response is found suitable to a particular application, adjust the value of the gain resistor to increase or decrease the overall amplifier gain. finally, it is important to realize the effects of the feedback resistance on distortion. increasing the resistance decreases the loop gain and increases the distortion. it is also important to know that decreasing load impedance increases total harmonic distortion (thd). typically, the third order harmonic distortion increases more than the second order harmonic distortion. table 1. recommended feedback resistor values for 25 w loads gain r f 1 1.3 k w 2, 1 1.1 k w 5 820 w 7.8 680 w 10 510 w
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 20 post office box 655303 ? dallas, texas 75265 application information shutdown control there are two shutdown pins which control the shutdown for each amplifier of the ths6032. when the shutdown pin signals are low, the ths6032 is active. but, when a shutdown pin is high ( 2 v), the corresponding amplifier is turned off. the shutdown logic is not latched and should always have a signal applied to it. to help ensure a fixed logic state, an internal 50 k w resistor to dgnd is utilized. an external resistor, such as a 3.3 k w , to dgnd may be added to help improve noise immunity within harsh environments. if no external resistor is utilized and shdn x pins are left unconnected, the ths6032 will default to a power-on state. a simplified circuit can be seen in figure 43 . +v cc(h) to internal bias circuitry control v cc(h) dgnd dgnd 50 k w shdn x figure 43. simplified ths6032 shutdown control circuit shutdown function the ths6032 incorporates a shutdown circuit to conserve power. traditionally when an amplifier is placed into shutdown mode, the input and output circuitry are turned off. this conserves a large amount of power, but the output impedance will be a very high, typically greater than several k w . this situation does not allow for proper line termination resulting in a severe reduction of the receive signal coming through the transmission line (see figure 36). the ths6032 eliminates this problem. when the shdn x pin voltage is greater than 2 v, the ths6032 enters shutdown mode to conserve power. unlike the traditional amplifier, the ths6032's output impedance is typically 0.5 w at 1 mhz (see figure 28). the shutdown mode function results in the proper termination of the line without degradation in performance of the receive signal coming through the transmission line. there are a few design considerations in order to fully achieve this type of functionality. to better understand these design considerations, it is helpful to examine what is happening inside the ths6032. figure 44 shows the simplified shutdown components. notice that there are two similar input stages; the normal input stage consisting of transistors q 1 through q 4 and the shutdown input stage consisting of transistors q s1 through q s4 . when in shutdown mode, the i (bias 1) and i (bias 2) current sources are turned off. this turns off the normal input stage of the amplifier. the i (bias s1) and i (bias s2) current sources are then turned on. the shutdown input stage signals are then fed through the same internal circuitry which the normal input stage drove. this allows for sinking and sourcing large amounts of current at the output of the ths6032 during shutdown operation. the q s1 through q s4 transistors are not designed for the performance like the q 1 through q 4 transistors because their only function is to amplify the dc ground reference, dgnd. a 1-k w resistor connects internally to the output node of the amplifier, which provides a feedback loop in shutdown mode. this forces the output impedance to become very small, making for proper transmission line termination.
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 21 post office box 655303 ? dallas, texas 75265 application information shutdown function (continued) 1 k w to internal output node q 2 +in pin in pin to output drive circuitry q 1 q 3 q 4 q 5 q 6 +v cc(h) i bias1 i bias2 dgnd q s1 i biass1 i biass2 q s2 q s3 q s4 shutdown circuitry active load active load cc(h) v figure 44. simplified ths6032 input stages because the dgnd pin voltage is effectively at a noninverting terminal, any signal or voltage fluctuation at this node is amplified by the ths6032. this could possibly cause a noisy output to appear during shutdown operation. figure 45 shows the frequency response of the ths6032 due to an input signal at the dgnd terminal. the maximum dgnd voltage signal which the ths6032 will follow linearly during shutdown operation is less than 4 v. with this dynamic range capability, it is recommended that the dgnd pin be as noise-free as possible to ensure proper transmission line termination. figure 45 6 5 4 3 2 1 0 1 2 3 dgnd output amplitude vs frequency f frequency hz 100 k 1 m 10 m 100 m v cc(h) = 15 v v cc(l) = 5 v r l = 25 w v sd = +10 v v i = dgnd pin dgnd output amplitude db v o(pp) = 0.2 v v o(pp) = 2 v
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 22 post office box 655303 ? dallas, texas 75265 application information shutdown function (continued) the second design consideration is due to transistors q 5 and q 6 . these transistors ensure the +in to in voltage separation is less than a v be drop (about 0.7 v). this protects the other transistors, q 1 to q 4 , from saturating during fast transients. transistors q 5 and q 6 also enhance the slew rate capabilities of the ths6032. when a fast transient is applied to the input, these transistors will quickly apply the currents to the active load stages. a design issue with this setup is that while in shutdown mode, a large enough signal being applied to the input pins may turn on these transistors. once the input voltage differential between the +in and in pins reaches 0.7-v, transistors q 5 and q 6 turn on applying the difference signal to the rest of the amplifier circuitry. because these two transistors are designed for much higher performance levels than the shutdown circuitry transistors (q s3 and q s4 ), they will become dominant and the difference input signal will be utilized instead of the dgnd signal. because the external negative feedback resistor path is still connected around the amplifier, this difference input signal will be amplified just like a normal amplifier is designed to do (see figure 46). as long as the +in and in input signals are kept below 0.7 v, the isolation from input-to-output is very high as shown in the shutdown isolation vs frequency graphs (see figures 30 and 31). to ensure proper shutdown functionality of the ths6032, it is important to keep the dgnd voltage noise-free. additionally, the +in and in signals should be limited to less than 0.7 v during shutdown mode. this will ensure proper line termination functionality while conserving power. figure 46 0 1 2 3 4 5 6 7 0246810 shutdown feedthrough v in input voltage v v cc(h) = 15 v v cc(l) = 5 v r l = 25 w v sd = 5 v out output voltage v v g = 5 g = 2 g = +1; g = 1 slew rate the slew rate performance of a current feedback amplifier, like the ths6032, is affected by many different factors. some of these factors are external to the device, such as amplifier configuration and pcb parasitics, and others are internal to the device, such as available currents and node capacitance. understanding some of these factors should help the pcb designer arrive at a more optimum circuit with fewer problems.
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 23 post office box 655303 ? dallas, texas 75265 application information slew rate (continued) whether the ths6032 is used in an inverting amplifier configuration or a noninverting configuration can impact the output slew rate. slew rate performance in the inverting configuration is generally faster than the noninverting configuration. this is because in the inverting configuration the input terminals of the amplifier are at a virtual ground and do not significantly change voltage as the input changes. consequently, the time to charge any capacitance on these input nodes is less than for the noninverting configuration, where the input nodes actually do change in voltage an amount equal to the size of the input step. in addition, any pcb parasitic capacitance on the input nodes degrades the slew rate further simply because there is more capacitance to charge. if the main supply voltage v cc(h) to the amplifier is reduced, slew rate decreases because there is less current available within the amplifier to charge the capacitance on the input nodes as well as other internal nodes. also, as the load resistance decreases, the slew rate typically decreases due to the increasing internal currents, which slow down the transitions. internally, the ths6032 has other factors that impact the slew rate. the amplifier's behavior during the slew rate transition varies slightly depending upon the rise time of the input. this is because of the way the input stage handles faster and faster input edges. slew rates (as measured at the amplifier output) of less than about 1200 v/ m s are processed by the input stage in a very linear fashion. consequently, the output waveform smoothly transitions between initial and final voltage levels. for slew rates greater than 1200 v/ m s, additional slew-enhancing transistors present in the input stage (transistors q5 and q6 in figure 44) begin to turn on to support these faster signals. the result is an amplifier with extremely fast slew rate capabilities. the additional aberrations present in the output waveform with these faster slewing input signals are due to the brief saturation of the internal current mirrors. this phenomenon, which typically lasts less than 20 ns, is considered normal operation and is not detrimental to the device in any way. if for any reason this type of response is not desired, then increasing the feedback resistor or slowing down the input signal slew rate reduces the effect. figure 47 2 0 4 6 slewing 10 v pulse t time ns 0 50 100 150 200 2 8 6 4 8 250 sr = 1400 v/ m s v cc(h) = 15 v v cc(l) = 5 v gain = +5 r f = 1.1 k w r l = 25 w t r /t f = 1 ns output voltage v v o 25 75 125 175 225 figure 48 4 0 8 12 slewing 20 v pulse t time ns 0 50 100 150 200 4 16 12 8 16 250 sr = 4000 v/ m s v cc(h) = 15 v v cc(l) = 5 v gain = +5 r f = 1.1 k w r l = 25 w t r /t f = 1 ns output voltage v v o 25 75 125 175 225
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 24 post office box 655303 ? dallas, texas 75265 application information noise calculations and noise figure noise can cause errors on very small signals. this is especially true for the amplifying small signals. the noise model for current feedback amplifiers (cfb) is the same as voltage feedback amplifiers (vfb). the only difference between the two is that the cfb amplifiers generally specify different current noise parameters for each input, while vfb amplifiers usually only specify one noise current parameter. the noise model is shown in figure 49. this model includes all of the noise sources as follows: ? e n = amplifier internal voltage noise (nv/ hz ) ? in+ = noninverting current noise (pa/ hz ) ? in = inverting current noise (pa/ hz ) ? e rx = thermal voltage noise associated with each resistor (e rx = 4 ktr x ) _ + r f r s r g e rg e rf e rs e n in+ noiseless in e ni e no figure 49. noise model the total equivalent input noise density (e ni ) is calculated by using the following equation: e ni e n 2 in r s 2 in r f r g 2 4ktr s 4kt r f r g where: k = boltzmann's constant = 1.380658 10 23 t = temperature in degrees kelvin (273 + c) r f || r g = parallel resistance of r f and r g to get the equivalent output noise of the amplifier, just multiply the equivalent input noise density (e ni ) by the overall amplifier gain (a v ). e no e ni a v e ni 1 r f r g (noninverting case)
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 25 post office box 655303 ? dallas, texas 75265 application information noise calculations and noise figure (continued) as the previous equations show, to keep noise at a minimum, small value resistors should be used. as the closed-loop gain is increased (by reducing r g ), the input noise is reduced considerably because of the parallel resistance term. this leads to the general conclusion that the most dominant noise sources are the source resistor (r s ) and the internal amplifier noise voltage (e n ). because noise is summed in a root-mean-squares method, noise sources smaller than 25% of the largest noise source can be effectively ignored. this can greatly simplify the formula and make noise calculations much easier to calculate. for more information on noise analysis, please refer to noise analysis in operational amplifier circuits , literature number slva043a this brings up another noise measurement usually preferred in rf applications, the noise figure (nf). noise figure is a measure of noise degradation caused by the amplifier. the value of the source resistance must be defined and is typically 50 w in rf applications. nf 10log
e 2 ni e rs 2 because the dominant noise components are generally the source resistance and the internal amplifier noise voltage, we can approximate noise figure as: nf 10log
1 e n 2 in r s 2 4ktr s
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 26 post office box 655303 ? dallas, texas 75265 application information noise calculations and noise figure (continued) figure 50 shows the noise figure graph for the ths6032. noise figure vs source resistance noise figure db 0 2 4 6 8 10 12 14 16 18 20 10 100 1000 10000 source resistance r s ( w ) f = 10 khz t a = 25 deg. c figure 50. noise figure vs source resistance offset voltage the output offset voltage, (v oo ) is the sum of the input offset voltage (v io ) and both input bias currents (i ib ) times the corresponding gains. figure 51 can be used to calculate the output offset voltage. v oo v io 1 r f r g i ib r s 1 r f r g i ib r f + v i + r g r s r f i ib v o i ib+ figure 51. output offset voltage model
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 27 post office box 655303 ? dallas, texas 75265 application information general configurations a common error for the first-time cfb user is to create a unity gain buffer amplifier by shorting the output directly to the inverting input. a cfb amplifier in this configuration oscillates and is not recommended. the ths6032, like all cfb amplifiers, must have a feedback resistor for stable operation. additionally, placing capacitors directly from the output to the inverting input is not recommended. this is because, at high frequencies, a capacitor has a very low impedance. this results in an unstable amplifier and should not be considered when using a current-feedback amplifier. because of this, simple low-pass filters, which are easily implemented on a vfb amplifier, have to be designed slightly differently. if filtering is required, simply place an rc-filter at the noninverting terminal of the operational-amplifier (see figure 52). v i v o c1 + r g r f r1 f 3db 1 2 r1c1 v o v i 1 r f r g 1 1 sr1c1 figure 52. single-pole low-pass filter if a multiple pole filter is required, the use of a sallen-key filter can work very well with cfb amplifiers. this is because the filtering elements are not in the negative feedback loop and stability is not compromised. because of their high slew-rates and high bandwidths, cfb amplifiers can create very accurate signals and help minimize distortion. one implementation of the sallen-key filter is shown in figure 53. for more information on sallen-key filters, refer to the analysis of the sallen-key architecture , literature number sloa024a. v i c2 r2 r1 c1 r f r g r1 = r2 = r c1 = c2 = c q = peaking factor (butterworth q = 0.707) ( = 1 q 2 ) r g r f _ + f 3db 1 2 rc figure 53. 2-pole low-pass sallen-key filter another good use for the ths6032 amplifiers is as video distribution amplifiers. one characteristic of distribution amplifiers is the fact that the differential phase (dp) and the differential gain (dg) are compromised as the number of lines increases and the closed-loop gain increases. be sure to use termination resistors throughout the distribution system to minimize reflections and capacitive loading.
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 28 post office box 655303 ? dallas, texas 75265 application information general configurations (continued) + 1.1 k w 1.1 k w 75 w 75 w 75 w 75 w 75 w n lines v o1 v on ths6032 75 w transmission line v i 1/2 figure 54. video distribution amplifier application driving a capacitive load driving capacitive loads with high performance amplifiers is not a problem as long as certain precautions are taken. the first is to realize that the ths6032 has been internally compensated to maximize its bandwidth and slew rate performance. when the amplifier is compensated in this manner, capacitive loading directly on the output will decrease the device's phase margin leading to high frequency ringing or oscillations. therefore, for capacitive loads of greater than 10 pf, it is recommended that a resistor be placed in series with the output of the amplifier, as shown in figure 55. a minimum value of 10 w should work well for most applications. for example, in adsl systems, setting the series resistor value to 12.5 w both isolates any capacitance loading and provides the proper line impedance matching at the source end. + _ ths6032 c load 1.1 k w input output 1.1 k w 10 w figure 55. driving a capacitive load evaluation board evaluation boards are available for the ths6032. each board has been configured for proper thermal management of the ths6032 depending on package selection. the circuitry has been designed for a typical adsl application as shown previously in this document. to order the evaluation board, contact your local ti sales office or distributor.
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 29 post office box 655303 ? dallas, texas 75265 mechanical data dwp (r-pdso-g**) powerpad ? plastic small-outline package gage plane 0.419 (10,65) 0.400 (10,16) 0.010 (0,25) nom thermal pad (see note d) 0.010 (0,25) 0.016 (0,40) 0.050 (1,27) seating plane 4147575/a 04/98 11 10 a 20-pin shown 20 1 0.104 (2,65) max 0.293 (7,45) 0.299 (7,59) 0.020 (0,51) 0.014 (0,35) 0.004 (0,10) m 0.010 (0,25) 0.050 (1,27) 0 8 0.710 28 0.510 20 0.610 24 0.700 (18,03) (17,78) 0.500 (15,49) (15,24) 0.600 0.410 16 dim pins ** (10,41) (10,16) 0.400 a min a max (12,95) (12,70) 0.006 (0,15) 0.002 (0,05) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). d. the package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. this pad is electrically and thermally connected to the backside of the die and possibly selected leads. powerpad is a trademark of texas instruments incorporated.
ths6032 low-power adsl central-office line driver slos233c april1999 revised march 2000 30 post office box 655303 ? dallas, texas 75265 mechanical data gqe (s-plga-n80) plastic land grid array 9 8 7 6 5 j h g f e d 3 2 1 c b a 4 4,00 typ seating plane 5,20 4,80 sq 0,87 0,93 0,08 max 0,23 0,33 1,00 max 0,50 0,50 0,08 m ? 0,05 4200461/a 10/99 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. microstar junior lga ? configuration microstar junior lga is a trademark of texas instruments incorporated.
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with ti's standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (acritical applicationso). ti semiconductor products are not designed, authorized, or warranted to be suitable for use in life-support devices or systems or other critical applications. inclusion of ti products in such applications is understood to be fully at the customer's risk. in order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. ti's publication of information regarding any third party's products or services does not constitute ti's approval, warranty or endorsement thereof. copyright ? 2000, texas instruments incorporated

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